Algorithms for Low Power Hardware Synthesis from CAOS -- Concurrent Action Oriented Specifications

Low-power behavioral synthesis has been given considerable attention in the recent past. Recently, new hardware specification formalisms have been proposed where the specification is action-oriented rather than composition of sequential threads. We call such specification formalisms CAOS or Concurrent Action Oriented Specifications. CAOS models have low granularity concurrent atomic action descriptions with a semantics similar to Dijkstra's guarded command language. Such low granularity atomic action based modeling relieves the designer of the obligation of a priori scheduling of actions in the form of CDFGs. In this sense, these methodologies raise the abstraction level of hardware specification. Bluespec is one prime example of a CAOS. We believe that using action-oriented formalism for low-power synthesis provides more opportunities for power-optimal synthesis. In this paper, we consider a CAOS akin to the Bluespec's model of computation, and consider algorithms for reducing different power metrics (namely, peak power, and switching power). We formulate the problems of poweroptimal synthesis for CAOS, discuss several heuristics and show some numerical examples illustrating the use of such heuristics during CAOS based low-power synthesis process. Algorithms for Low Power Hardware Synthesis from CAOS -Concurrent Action Oriented Specifications. Gaurav Singh Sandeep K. Shukla {gasingh, shukla}@vt.edu